OpenPICC Design

[Milosch Meriac]

Dear Pradeep,

Pradeep Balavinodan wrote:
> Please note that I am a student pursuing my Masters of Engineering at the
> University of Adelaide, Australia. I just went through your OpenPICC design
> (schematics and PCB) and was stuck up with the following points:
> 
> 1) I couldn't figure out as to how the signal from the antenna is directly
> demodulated.

The carrier is demodulated by diode D1 - straight forward AM
demodulation. Probably you miss the capacitor after D1  - such an
capacitor is senseless because the capacity needed is much smaller than
the capacity D1 already has.

> 2) Secondly, shouldn't the carrier signal from the PLL be demodulated first
> instead of being fed directly to the microcontroller?

I see no point in that. The idea of the PLL is to regenerate the carrier
 during modulation pauses. Therefore the PLL runs free during modulation
pauses. This regenerated carrier is then fed back into the CPU where
it's divided by a counter to the sub carrier bitclock.
This subcarrier clock is mainly used for SSC sampling of incoming data
and transmitting SSC data in a carrier synchronous fashion.

> If you have any document that explains the complete schematic connections or a
> block diagram for the system, could you please me send the same?

Such an document does not exist - feel free to contribute your finding
in form of such a document :). Some information although does exist in
slides of our talks:

http://www.openpcd.org/releases.0.html

Best regards,

Milosch
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